3/18/2019

Support 400G Ethernet deployment, the first 58Gbps FPGA transceiver to start mass production

This week's fiber-optic communications (OFC) conference was held in San Diego.At this conference, Intel's programmable solutions business division will showcase the market's unique 58Gbps transceiver technology integrated into Intel Stratix10 TX FPGA, bringing the world's first field-programmable gate array (FPGA) that USES 58Gbps PAM4 transceiver technology.
"Today's announcement is the culmination of our continued efforts to promote product innovation and feature development to speed up data acquisition and processing that is critical to network and data center applications, and highlights the real value that Intel FPGA can create for customers."
-- Dan McNamara, senior vice President and general manager, programmable solutions, Intel corporation
This advanced technology doubles the transceiver bandwidth compared to traditional solutions.Such improvements are critical for high-bandwidth applications such as networking, cloud and 5G applications, optical transmission networks, enterprise networks, cloud service providers and 5G.By supporting dual mode modulation, 58Gbps PAM4, and 30Gbps NRZ, the new infrastructure can achieve 58Gbps data rates while maintaining backward compatibility with existing network infrastructure.
StraTIx 10 TX FPGA with 58Gbps PAM4 transceiver technology provides architects with higher transceiver bandwidth and hardened IP cores to meet their growing demand for higher density and faster connection speeds.
"The market for 400Gb Ethernet and qsfp-dd is growing fast," said Ildefonso m. Polo, VeEX's vice President of product marketing.Taking the lead in introducing portable solutions in the market will help enterprises grasp the opportunity and put the experimental results into practice more quickly."" we are proud to work closely with Intel to launch our next generation of test modules that use the native 58Gbps PAM4 production weight FPGA technology. 
Intel StraTIx 10 TX FPGA offers up to 144 transceiver channels and serial data rates from 1 to 58 Gbps, boosting the future of networking, network virtualization (NFV) and optical transmission solutions.This combination provides a higher total bandwidth than the existing FPGA, enabling system architectures to scale to 100Gb, 200Gb, and 400Gb transmission speeds. 
Various hard intellectual property (IP) kernels, including 100Gb MAC and FEC, provide optimized performance, latency, and power consumption.
Intel StraTIx 10 FPGA 58Gbs transceiver provides interconnection to 400 gigabit Ethernet FPGA and provides access to routers, switches, active fiber optic cables and direct-connect cables, interconnect and test and measurement equipment for new high bandwidth requirements using only eight channels. 
On Intel's "architecture day," Intel unveiled a 112G PAM4 high-speed transceiver test chip built using a 10-nanometer process technology.The chip will be integrated into Intel's next generation FPGA product line to meet the demanding bandwidth requirements of the next generation of data centers, enterprises, and network environments.

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